The present invention relates to information processing technologies, and more specifically, to a method, a device and a circuit structure for pattern matching.
Pattern matching means finding a specific pattern from a stream of patterns. Pattern matching is a basic technique in computer applications. As an example, finding a target string from a text is a kind of pattern matching. In such a scenario, the target string to be found corresponds to the above specific pattern and the text corresponds to the above stream of patterns. As another example, Deep Packet Inspection (DPI), which has been widely applied to Intrusion Detection/Intrusion Prevention, Spam Blocking, Antivirus, Data Leakage Prevention, Content Filtering or the like, detects whether there is a packet or a sequence of packets with attack characteristics in a stream of data. In this scenario, the stream of data corresponds to the above stream of patterns, and the packet or the sequence of packets with attack characteristics correspond to the above specific pattern.
On one hand, a long term of research has been conducted for pattern matching and numerous software algorithms have been obtained. On the other hand, as can be appreciated by a person of skill in the art, circuit components in a hardware platform operate in parallel and thereby a faster speed can be reached. Accordingly, it is desired to implement the software algorithms with hardware so as to increase the speed of pattern matching. However, a problem of high cost and high complexity will be confronted when transplanting a whole software algorithm into the hardware platform. To this end, it may be envisaged to transplant a portion of the software algorithm suitable for hardware implementation into the hardware platform.